FERROELECTRIC SYNAPTIC WEIGHTS FOR BACK-END-OF-LINE INTEGRATION
On June 9th 2022 at 14:30 p.m. (CET) July 6th 2022 at 14:00 p.m. (CET) the following on-line seminar will be given by Dr. Laura Bégon-Lours (home page), post-Doctoral researcher in the Neuromorphic Systems and Devices group in IBM Research Zurich.
Abstract
Deep-Neural-Networks accelerators aim at implementing the Vector-Matrix-Multiplication in the analog domain, by a parallel voltage drop through a cross-bar array of reprogrammable resistances. Among the technologies available for the fabrication of the “synaptic” weights, ferroelectric-based devices show analog resistive switching, excellent retention properties and small stochasticity. In this talk, we will discuss the development of HfZrO4 ferroelectric synaptic weights from an industry perspective and how we constrain our processes to CMOS compatible technologies, by adhering to a moderate thermal budget1.
Two technologies will be presented: two2,3 and three4 terminals devices, respectively Ferroelectric Tunnel Junctions (FTJs) and Ferroelectric Field-Effect Transistors (FeFETs). Both use a transition metal oxide (WOx<3) to avoid the formation of an interfacial dielectric layer and maximize the ferroelectric field-effect as well as the retention. They exhibit analog potentiation and depression, as well as an Ohmic behavior around the read voltage of 100 mV, required for the analog
multiplication. FeFETs and FTJs exhibit excellent cycle-to-cycle variation, with a standard deviation less than 2%, and excellent endurance: 106 full switching cycles before breakdown for FeFETs and 108 for FTJs.
The processes are developed towards a smaller device footprint: the current density is increased by 104 for FTJs5, as well as channel dimensions of FeFETs scaled6 from 10-10 m2 to 10-15 m2. The synaptic functionalities of the devices are evaluated in terms of their
scalability: scaled FTJs see their On/Off divided by 3, but allow sub-Volt operation and endurance up to 1010 cycles. In FeFETs, the maximum On/Off ratio is obtained for gate-first devices with optimized channel lengths of 300 nm. The material parameters are obtained by structural and temperature dependent electrical characterization: in FTJs, the resistive switching is not described by a Schottky height modulation, but by a change in the resistance of the Ohmic contact at
the HZO/WOx interface upon polarization switching. In FeFETs, the experiments show a change in the resistance of the Ohmic contacts to the channel, as well as a modulation by two orders of magnitude in the mobility-carrier density product of the WOx.
This work is supported by FREEMIND (840903), BeFerroSynaptic (871737), ULPEC (732642), CHIST-ERA, UNICO (No. 20CH21-186952) and the BRNC.
[1] O’Connor, É. et al., APL Mater. 6, 121103 (2018)
[2] Bégon-Lours, L. et al., IEEE JEDS (2021)
[3] Bégon-Lours, L. et al., Advanced Electronic Materials (2022)
[4] Halter, M. et al., ACS A. M. Int. 12, 17725–17732 (2020)
[5] Bégon-Lours, L. et al., Neuromorphic Computing and Engineering (2022)
[6] Falcone, D. F. et al., Frontiers in Electronic Materials (2021)
Details of the online seminar
Use the following info to connect to the seminar on Zoom
Meeting ID: 970 7378 5381
Link: https://polimi-it.zoom.us/j/97073785381
For any technical issue, please promptly contact christian.rinaldi@polimi.it
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